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Pao-Ann Hsiung's Year 2009 Publications

(For ABSTRACTS: click on paper titles, For FULL PAPERS: click on PDF icons)
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    International Journal Papers

  1. P.-A. Hsiung and C.-C. Chiang, "Scheduling and Placement of Hardware/Software Real-Time Relocatable Tasks in Dynamically Partially Reconfigurable Systems," ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2009 (accepted for publication).
  2. C.-S. Lin, P.-A. Hsiung, S.-W. Lin, Y.-R. Chen, C.-H. Lu, S.-Y. Tong, W.-T. Su, W. C. Chu, C.-H. Shih, N.-L. Hsueh, C.-H. Chang, and C.-S. Koong, "VERTAF/Multi-Core: A SysML-based Application Framework for Multi-Core Embedded Software Development," Journal of the Chinese Institute of Engineers, Vol. 32, No. 7, pp. 985-991, November 2009 (SCI).
  3. P.-A. Hsiung, S.-W. Lin, Y.-R. Chen, C.-H. Huang, and W.C. Chu, "Modeling and Verification of Real-Time Embedded Systems with Urgency," Journal of Systems and Software, Volume 82, No. 10, pp. 1627-1641, Elsevier Inc., October 2009. (DOI: http://dx.doi.org/10.1016/j.jss.2009.03.013)

  4. C. Shih, P.-A. Hsiung, T.-K. Liu, Y. Yang, C.-H. Lin, C.-H. Wan, C.-S. Koong, and W. C. Chu, "The Integration of a Vision based Tracking Platform, Visual Instruction and Error Analysis Models for an Efficient Billiard Training System," Optical Engineering, 2009 (SCI, accepted for publication).

  5. P.-A. Hsiung, C.-H. Huang, and Y.-H. Chen, "Hardware Task Scheduling and Placement in Operating Systems for Dynamically Reconfigurable SoC," Journal of Embedded Computing (JEC), Vol. 3, No. 1, IOS Press, The Netherlands, 2009. (an EUC'2005 special issue, out of 376 submissions and 114 paper presentations, only 7 papers were invited for publication in this special issue)

  6. C.-H. Huang and P.-A. Hsiung, "Hardware Resource Virtualization for Dynamically Partially Reconfigurable Systems," Embedded Systems Letters, Volume 1, Issue 1, IEEE Press, USA, 2009.

  7. Books and Chapters

  8. C.-H. Lin, K.-S. Hwang, P.-A. Hsiung, M.-H. Yen, Y. Chu, S.-J. Chen, W. C. Chu, "An Adaptive Reasoning and Learning Framework for Mobile Cognitive Radio Systems," Handbook on Mobile Software Engineering, IGI Global, 2009.

  9. P.-A. Hsiung and M. D. Santambrogio, Reconfigurable System Design and Verification, CRC Press, USA, 2009.

  10. S.-J. Chen, G.-H. Lin, P.-A. Hsiung, and Y.-H. Hu, Hardware-Software Co-design of a Multimedia SoC Platform, Springer, USA, 2009.

  11. International Conferences

  12. J.-S. Shen, C.-H. Huang, and P.-A. Hsiung, "Learning-based Adaptation to Applications and Environments in a Reconfigurable Network-on-Chip," Proceedings of the Design, Automation & Test in Europe (DATE), Dresden, Germany, March 2010.
  13. C.-H. Chang, C.-W. Lu, W. C. Chu, C.-H. Shih, C.-T. Yang, P.-A. Hsiung, N.-L. Hsueh, and C.-S. Koong, "SysML-based Requirement Modeling Environment for Mulicore Embedded System," Proceedings of the 25th ACM Symposium on Applied Computing (SAC, Sierre, Switzerland), ACM Press, March 2010.
  14. S.-H. Yang and P.-A. Hsiung, "RFID Campus for Special Education Schools," Proceedings of the Asian Pacific International Conference on RFID, Taipei, Taiwan, December 2009.
  15. C. Shih, C.-T. Wu, C.-Y. Lin, P.-A. Hsiung, N.-L. Hsueh, C.-H. Chang, C.-S. Koong, and W. C. Chu, "A Model-Driven Multicore Software Development Environment for Embedded System," Proceedings of the 33rd IEEE International Computer Software and Applications Conference, Washington, USA, IEEE CS Press, July 2009.
  16. J.-S. Shen, C.-H. Huang, and P.-A. Hsiung, "PRESSNoC: Power-Aware and Reliable Encoding Schemes Supported Reconfigurable Network-on-Chip Architecture," Proceedings of the Fourth International Conference on Embedded and Multimedia Computing, (EM-Com), Jeju, Korea, December 2009. (Best Paper Award)
  17. C.-H. Lu, K.-C. Chiang, and P.-A. Hsiung, "Round-based Priority Arbitration for Predictable and Reconfigurable Network-on-Chip," Proceedings of the International Conference on Field-Programmable Technology (FPT), December 2009.
  18. K.-J. Shih, Y.-H. Lin, and P.-A. Hsiung, "Quality-of-Service Optimization for Multiple Multimedia Tasks in Real-Time Embedded Systems," Proceedings of the 10th International Symposium on Pervasive Systems, Algorithms and Networks (I-SPAN), Kaohsiung, Taiwan, December 2009.
  19. C.-H. Lu, H.-W. Liao, and P.-A. Hsiung, "Multi-Objective Placement of Reconfigurable Hardware Tasks in Real-Time System," Proceedings of the International Workshop on Reconfigurable and Multicore Embedded Systems, (WoRMES, Vancouver, Canada), IEEE CS Press, August 2009.

  20. C. Shih, P.-A. Hsiung, N.-L. Hsueh, C.-H. Chang, C.-S. Koong, and W.C. Chu, "A Model-Driven Multicore Software Development Environment for Embedded Systems," Proceedings of the 3rd IEEE International Workshop Quality-Oriented Reuse of Software (QUORS, Seattle, USA), IEEE CS Press, July 2009.
  21. Y.-R. Chen, T.-Y. Chen, P.-A. Hsiung, S.-J. Chen, and Y.-H. Hu, "Compositional Automata Reduction with Non-critical Path Slicing," Proceedings of the International Conference on Foundations of Computer Science (FCS), July 2009.

  22. J. C. Lin, C. Yu, M. S. Yen, P. A. Hsiung, S. J. Chen, and Y. H. Hu, "Parallel Implementation of Convolution Encoder for Software Defined Radio on DSP Architecture," International Symposium on Systems, Architectures, Modeling, and Simulation (SAMOS), Greece, pp.~180--186, July 2009.

  23. P.-A. Hsiung, C.-S. Lin, S.-W. Lin, Y.-R. Chen, C.-H. Lu, S.-Y. Tong, W.-T. Su, C. Shih, C.-S. Koong, N.-L. Hsueh, C.-H. Chang, William C. Chu, "VERTAF/Multi-Core: A SysML-based Application Framework for Multi-Core Embedded Software Development," Proceedings of the International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP), LNCS, Springer Verlag, (accepted for presentation), June 2009.

  24. P.-A. Hsiung, S.-W. Lin, Y.-R. Chen, N.-L. Hsueh, C.-H. Chang, C.-H. Shih, C.-S. Koong, C.-S. Lin, C.-H. Lu, S.-Y. Tong, W.-T. Sun, and W. C. Chu, "Model-Driven Development of Multi-Core Embedded Software," Proceedings of the 2nd International Workshop on Multicore Software Engineering (IWMSE), May 2009.

  25. Y. Chu, M.-H. Yen, P.-A. Hsiung, and S.-J. Chen, "Design of a High-Speed Block Interleaving/Deinterleaving Architecture for Wireless Communication Applications," Proceedings of the 27th IEEE International Conference on Consumer Electronics (ICCE), January 2009.

  26. C.-H. Huang and P.-A. Hsiung, "On the Use of a UML-Based HW/SW Co-Design Platform for Reconfigurable Cryptographic Systems," Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, May 2009.

  27. J.W. Lin, D.-T. Yen, W.-Y. Hu, C. Yu, M.-H. Yen, P.-A. Hsiung, and S.-J. Chen, "A 900 MHz to 5.2 GHz Dual-Loop Feedback Multi-band LNA," Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, May 2009.

    Local Conferences

  28. C.-H. Huang, J.-S. Shen, and P.-A. Hsiung, "Model-Based Verification and Estimation Framework for Dynamically Partially Reconfigurable System," Proceedings of the National Computer Symposium (NCS, Taiwan), December 2009. (Best Paper Award in the Workshop on Computer Architecture, Embedded Systems, and VLSI/EDA)

  29. Last Updated: December 21, 2009.