In this work, a resistor-based temperature is presented. The resistive temperature sensing module is embedded in a 2nd-order 1-bit continuous-time delta-sigma modulator (CTDSM) to realize a hardware- and energy-efficient temperature-to-digital converter. To achieve low noise, chopping technique is applied to mitigate the mismatch and flicker noise of the first-stage amplifier. A finite impulse response (FIR) filter is added to the feedback path to address the noise fold-back that is attributed to the input dependent error voltage when using chopper. The proposed circuit consumes 183.6 μW from a 1.8-V supply voltage. The temperature range is -40°C to 100 °C. At a single conversion time of 333 μs, the temperature resolution is better than 0.003 °C (1 δ), which lead to a resolution FoM of 0.55 pJ°C2.

Due to the advancement of the process technology, the power density of the modern System-on-Chip (SoC) is increased and results in serious thermal problem. Many dynamic thermal managements (DTMs) were proposed in recent years, the full-chip temperature information is captured relying on the on-chip temperature sensors. The conventional temperature sensors contain ADCs to convert the temperature sensitive voltage/current signal to the digital output results. However, the area overhead of the conventional analog temperature sensor becomes large when the requirement of the temperature sensing accuracy becomes strict. To solve the problem, we adopt the feature of the temperature-sensitive signal propagation delay to design an all-digital temperature sensor. The proposed all-digital thermal sensor adopts one single delay line to generate a temperature-sensitive pulse, and the width of the pulse is proportional to the measuring temperature. Afterward, we involve the time-to-digital converters (TDC) to convert the pulse width information to the digital temperature information. By using the TSMC CMOS 0.18μm process, the proposed all-digital temperature sensor can achieve more precise sensing resolution than the related works. The achieved sensing error is with -1.0°C to 1.0°C.

This paper presents a differential Colpitts voltage-controlled oscillator (VCO) for low power and low phase noise applications. Gm-boosted and complementary current-reuse techniques improves the current efficiency and achieves low power consumption. In addition, a clover-shaped inductor is utilized for reduction of inductive crosstalk. The prototype VCO is fabricated in a 0.18 μm CMOS technology, and has a power dissipation of 1.4 mW from a 1.1-V supply voltage. The measurement results show that the VCO can operate at frequencies of 2.34 to 2.55 GHz with a tuning range of 8.6%, and achieves a phase noise of −122.85 dBc/Hz at 1MHz offset, with FoM of 189 dBc/Hz.

A wireless power transfer (WPT) transmitter with class-E power amplifier is presented in this work. In the target application of implantable biomedical systems, variations of load condition and coil separation degrade the power transfer capability (PTC) and power conversion efficiency (PCE) significantly. In the proposed design, we adopted an impedance compression network (ICN) to compress the resulting impedance variation and to stabilize the performance. Duty-cycle control is introduced for further improvement. Designed and implemented with a 0.18-um CMOS process, at 13.56 MHz, simulation results show that more than 30 mW of output power can be obtained with coupling coefficient from 0.06 to 0.30. The maximum output power is 58.97 mW, and the maximum power conversion efficiency is 54.4% with drain efficiency of 81.0%. Compared to conventional structures, the proposed design achieves wide dynamic range while meeting the target output power and efficiency.

A highly-integrated CMOS power-management system with wide-range RF for ultra-high frequency (UHF) wireless energy harvesting is presented. To avoid environment-caused sudden power loss and to scavenge energy efficiently, the proposed power management system adopts power-aware rectifier architecture and adaptive DC-DC conversion ratios according to the input power level. The proposed system was fabricated in a 0.18-μm CMOS process. The system achieved a peak RF/DC conver-sion efficiency of 59%, a sensitivity of -11.6dBm, and a 13.5dB RF input range for at least 20% power efficiency at a 100KΩ load. At the high input power region (>-9dBm), the proposed architecture improves to about 15% efficiency when compared to a conventional rectifier followed by a linear regulator. The peak efficiency of the entire system is 37%.

This paper presents an energy harvesting interface for low-voltage energy-efficient Internet-of-Things (IoT) devices in standard 0.18-um CMOS technology. The proposed boost converter along with the capacitive bootstrapping technique converts the voltage from a thermoelectric generator to a near-threshold output voltage. The proposed capacitive bootstrapping technique generates a positive and negative bias pair to reduce the significant conduction losses of power transistors in a low-voltage operation. Besides, to efficiently extend the system’s output power range, the internal bias voltages are automatically adjusted according to the loading conditions. The converter combines constant on-time technique with digital zero current detection to achieve both low power consumption and low reverse inductor current. The experimental results demonstrate a maximum power conversion efficiency of 76% over a 1 μW–500 μW load range.