PDPTA'99 Codesign Session (C115 Abstract)

Multithreading-Based CoVerification Technique of HW/SW systems

M. Azizi, E.-M. Aboulhamid, and S. Tahar

Abstract

An embedded system consists of a set of heterogeneous components. These components may be software or hardware blocks with a limited specification. A global verification of such systems to check the equivalence between their implementation and their specification is challenging. Number of tools such as Seamless-CVE and Eaglei are now available. These tools perform coverification of HW/SW systems by cosimulation. This latter simulates concurrently the SW and HW components described respectively by HLL (High Level Language) and HDL (Hardware Description Language) codes. To improve the coverification process, we propose a methodology based on principles of multithreading and guided simulation. In this approach the software subsystem appears as a set of intercommunicating threads. Concurrent threads implement the communication with the hardware subsystem. Properties that should be verified can be added dynamically by creating new threads allowing their concurrent evaluation. The advantage of our methodology is that if any property is not satisfied, the result of simulation is known negative even before its end and appropriate action may be undertaken. Furthermore the degree and the amount of properties can be modified in a flexible way by changing the priority or the execution of some threads.