Pao-Ann Hsiung's Publications on Verification

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    International Journal Papers

  1. F. Wang and P.-A. Hsiung, " Efficient and User-Friendly Verification," IEEE Transactions on Computers , (accepted for publication, June 2001) NEW!!!

  2. P.-A. Hsiung, " Embedded Software Verification in Hardware-Software Codesign, " Journal of Systems Architecture --- the Euromicro Journal, Vol. 46, No. 15, pp. 1435 - 1450, Elsevier Science, the Netherlands, December 2000 (accepted in June 2000).

  3. J.-M. Fu, T.-Y. Lee, P.-A. Hsiung, and S.-J. Chen, " Hardware-Software Timing Coverification of Distributed Embedded Systems ," IEICE Transactions on Information and Systems Vol. E83-D, No. 9, pp. 1731 - 1740, September 2000.

  4. P.-A. Hsiung, " Hardware-Software Timing Coverification of Concurrent Embedded Real-Time Systems," IEE Proceedings on Computers and Digital Techniques, Vol. 147, No. 2, pp. 83 - 92, March 2000.

  5. P.-A. Hsiung, T.-Y. Lee, and S.-J. Chen, " MOBnet: An Extended Petri Net Model for the Distributed Object-oriented System-level Synthesis of Multiprocessor Systems," IEICE Transactions on Information and Systems, Vol. E80-D, No. 2, pp. 232-242, February 1997.

  6. P.-A. Hsiung, S.-J. Chen, T.-C. Hu, and S.-C. Wang, " PSM: An Object-Oriented Synthesis Approach to Multiprocessor System Design," IEEE Transactions on VLSI Systems, Vol. 4, No. 1, pp. 83-97, March 1996.

    7. Books and Chapters

  7. P.-A. Hsiung, Program Chair, Proc. of the International Workshop on Distributed System Validation and Verification (DSVV'2000, Taipei, Taiwan, ROC), April 2000.

  8. P.-A. Hsiung, System Level Synthesis for Parallel Computers, Ph.D. Dissertation, Graduate Institute of Electrical Engineering, National Taiwan University, June 1996.
    [Table of Contents ( text, toc.ps.gz) ]

    9. International Conference Papers

  9. P.-A. Hsiung, Win-Bin See, Trong-Yen Lee, Jih-Ming Fu, and Sao-Jie Chen, " Formal Verification of Embedded Real-Time Software in Component-Based Application Frameworks," Proc. 8th Asia-Pacific Software Engineering Conference (APSEC'01) , (Macau SAR, China), IEEE CS Press, December 4-7, 2001 (accepted for presentation, acceptance rate for regular papers: 44/145 = 30%).

  10. P.-A. Hsiung, Feng-Shi Su, Shu-Yu Jeng, and Yu-Ming Chang, " Verifiable Embedded Real-Time Application Framework, " Proc. IEEE International Real-Time Technology and Applications Symposium (RTAS'01), Work-In-Progress Session, (Taipei, Taiwan), pp. 109-110, IEEE Computer Society Press, May 2001.

  11. P.-A. Hsiung, F. Wang, R.-C. Chen, " On the Verification of Wireless Transaction Protocol Using SGM and RED ," Proc. the 7th IEEE International Conference on Real-Time Computing Systems and Applications (RTCSA'00, Korea), pp. 379-383, IEEE Computer Society Press, USA, December 2000.

  12. P.-A. Hsiung, " Concurrent Embedded Real-Time Software Verification," Proc. the 24th IEEE Computer Society International Computer Software and Applications Conference (COMPSAC'00, Taipei), pp. 516-521, IEEE Computer Society Press, USA, October 2000.

  13. P.-A. Hsiung, F. Wang, and Y. S. Kuo, " Verification of Concurrent Client-Server Real-Time Scheduling Systems, " Proc. the 6th International Conference on Real-Time Computing Systems and Applications, (RTCSA'99, Hong Kong), pp. 228 - 235, IEEE Computer Society Press, USA, December 1999.

  14. P.-A. Hsiung and F. Wang, " User Friendly Verification," Proc. 1999 IFIP TC6/WG6.1 Joint International Conference on Formal Description Techniques For Distributed Systems and Communication Protocols & Protocol Specification, Testing, And Verification, (FORTE/PSTV '99) Beijing, China, October 5 - 8, 1999.

  15. P.-A. Hsiung and F. Wang, "State Graph Manipulators," In Proc. of the International Workshop on Real-Time Constraints, (RTC'99, Alexandria, Virginia, USA), pp. 40 - 52, October 1999.

  16. P.-A. Hsiung, " Hardware-Software Coverification of Concurrent Embedded Real-Time Systems , " Proc. the 11th Euromicro Conference on Real-Time Systems (ECRTS'99, York, England), pp. 216-223, IEEE CS Press, June 1999.

  17. P.-A. Hsiung, " Timing Coverification of Concurrent Embedded Real-Time Systems, " Proc. the 7th IEEE/ACM International Workshop on Hardware-Software Codesign (CODES'99, Rome, Italy), pp. 110-114, ACM Press, New York, USA, May 1999.

  18. P.-A. Hsiung, F. Wang, and Y. S. Kuo, " Scheduling System Verification, " Proc. the 5th International Conference on Tools and Algorithms for the Construction and Analysis of Systems, (TACAS'99), Lecture Notes in Computer Science (LNCS), Vol. 1579, pp. 19-33, Amsterdam, the Netherlands, March 1999.

  19. F. Wang and P.-A. Hsiung, " Automatic Verification on the Large, " Proc. 3rd IEEE High-Assurance Systems Engineering Symposium (HASE'98), IEEE CS Press, pp. 134-141, Washington D.C., USA, November 1998, (invited paper).

  20. P.-A. Hsiung and F. Wang, " A State Graph Manipulator Tool for Real-Time System Specification and Verification ," Proc. 4th International Conference on Real-Time Computing Systems and Applications (RTCSA'98), IEEE Computer Society Press, pp. 181-188, Hiroshima, Japan, October 1998.

  21. F. Wang and P.-A. Hsiung, " Parametric Analysis of Computer Systems," Proc. 6th International AMAST Conference, Lecture Notes in Computer Science (LNCS) Vol. 1349, pp. 539-553, Springer-Verlag, Sidney, Australia, December 1997.

    22. Local Conference Papers

  22. S.-K. Huang, P.-A. Hsiung, F. Wang, Y.-S. Kuo, S.-C. Pan, " Verification of Object-Oriented Real-Time Scheduling Systems, " Proc. of the 10th OOTSIG Workshop on Object-Oriented Technology and Applications, NCTU, Taiwan, pp. 112-117, October 1999.

  23. P.-A. Hsiung, " Formalizing Hardware-Software Codesign Space Exploration, " Proc. 10th VLSI/CAD Symposium (VLSI/CAD'99), pp. 19-22, Nantou, Taiwan, R.O.C., August 1999.

    24. Others (Technical Reports, ...)

  24. P.-A. Hsiung, F. Wang, and Y.-S. Kuo, " Scheduling System Verification ," Technical Report TR-IIS-98-014, Insitute of Information Science, Academia Sinica, Taiwan, 1998.
    [Gzipped Postscript file of full report (tr98014.ps.gz, 107K)]

  25. F. Wang and P.-A. Hsiung, " Iterative Refinement and Condensation for State-Graph Construction ," Technical Report TR-IIS-98-009, Insitute of Information Science, Academia Sinica, Taiwan, 1998.
    [Gzipped Postscript file of full report (tr98009.ps.gz, 121K)]

  26. F. Wang and P.-A. Hsiung, " Parametric Analysis of Computer Systems," Technical Report TR-IIS-97-010, Insitute of Information Science, Academia Sinica, Taiwan, 1997.
    [Gzipped Postscript file of full report (tr97010.ps.gz, 149K)]

Last Updated July 20, 2001.