Nov. 27, 2020 Accepted Paper: 1147, 1216, 1218, 1368, 1433; Accepted Poster: 1451, 1783
Sept 15, 2020 Oct. 12, Monday, 2020, 11:59PM (UTC+0) Submission deadline for regular papers and SRC Research Abstract
Nov. 24, 2020Notification of paper/SRC acceptance
Dec. 14, 2020Deadline for camera-ready
High performance embedded computing has recently become more and more present in devices used in everyday life. A wide variety of applications, from consumer electronics to biomedical systems, require building up powerful yet cheap embedded devices. In this context, embedded software has turned out to be more and more complex, posing new challenging issues: the adoption of further flexible programming paradigms/architectures is becoming almost mandatory. Nonetheless, even nowadays the development of embedded systems must rely on a tight coupling of hardware and software components. Moreover, the market pressure calls for the employment of new methodologies for shortening the development time and for driving the evolution of existing products. New efficient solutions to problems emerging in this setting can be put into action by means of a joint effort of academia and industry.
Design of embedded systems must take into account a wide variety of constraints: performance, code size, power consumption, presence of real-time tasks, maintainability, security and possibly scalability: the more convenient trade-off has to be found, often operating on a large number of different parameters. In this scenario, solutions can be proposed at different levels of abstraction, making use of an assortment of tools and methodologies: researchers and practitioners have a chance to propose new ideas and to compare experimentations.
The focus of this conference track is on the application of both novel and well-known techniques to the embedded systems development. Particular attention is paid to solutions that require expertise in different fields (e.g. computer architecture, OS, compilers, security, software engineering, simulation). The track will benefit also from direct experiences in the employment of embedded devices in “unconventional” application areas, so to show up new challenges in the system design/development process. In this setting, researchers and practitioners from academia and industry will get a chance to keep in touch with problems, open issues and future directions in the field of development of dedicated applications for embedded systems.
Topics of Interest
Background: Application domains have had a considerable impact on the evolution of embedded systems, in terms of required methodologies and supporting tools and resulting technologies. SoCs are slowly making inroads in to the area of industrial automation to implement complex field-area intelligent devices which integrate the intelligent sensor/actuator functionality by providing on-chip signal conversion, data processing, and communication functions. There is a growing tendency to network field-area intelligent devices around industrial type of communication networks. Similar trends appear in the automotive electronic systems where the Electronic Control Units (ECUs), typically implemented as heterogeneous system-on-chip, are networked by means of one of safety-critical communication protocols such as FlexRay, for instance, for the purpose of controlling one of vehicle functions; electronic engine control, ABS, active suspension, etc. The design of this kind of networked embedded systems (this includes also hard real-time industrial control systems) is a challenge in itself due to the distributed nature of processing elements, sharing common communication medium, and safety-critical requirements, to mention some.
Aim: The aim of the track is to bring together researchers and practitioners from industry and academia and provide them with a platform to report on recent developments, deployments, technology trends and research results, as well as initiatives related to embedded systems and their applications in a variety of industrial environments.
Topics include, but are not limited to:
Embedded Systems, Cyberphysical Systems (CPS), and Internet-of-Things (IoT): System-level specification, modeling, virtual prototyping and simulation; Embedded system synthesis and optimization; Many- and multi-core SoC architecture; HW/SW co-design, co-simulation and co-verification; Energy/power management design and energy harvesting.
Embedded Software: Kernel, middleware, and virtual machine; Energy-efficient embedded software; Real-time software and operating systems; Software design for multicores, GPUs, and heterogeneous embedded architectures; Testing, debugging, profiling and performance analysis of Embedded Systems.
Memory Architecture and Near/In Memory Computing: Storage system and memory architecture; On-chip memory architectures and management: Scratchpads, compiler, controlled memories, etc.; Memory and storage hierarchies with emerging memory technologies; Near-memory and in-memory computing; Memory architecture and management for emerging memory technologies.
Neural Network and Deep Learning System Designs: AI and machine learning for embedded systems; Hardware and devices for neuromorphic and neural network computing; Systems for neural computing (including deep neural networks); Neural network acceleration co-design techniques; Design techniques for AI of Things.
Submission of Papers: Manuscripts must be submitted electronically in PDF format, according to the instructions contained in the main Conference web site. The review process is double blind. Please anonymize the paper submitted for review. The paper length is 8 pages, with the option to add 2 additional pages at extra charge, up to a maximum of 10 pages. Contributions must contain original unpublished work. Papers that have been concurrently submitted to other conferences or journals (double submissions) will be automatically rejected. All papers must be submitted through the main conference web page.
Paper Acceptance: Paper registration is required, allowing the inclusion of the paper/poster in the conference proceedings. An author or a proxy attending ACM SAC MUST present the paper: This is a requirement for the paper/poster to be included in the ACM/IEEE digital library. No-show of scheduled papers and posters will result in excluding them from the ACM/IEEE digital library.
Student Research Competition
Graduate students seeking feedback from the scientific community on their research ideas are invited to submit abstracts of their original unpublished and in-progress research work in areas of experimental computing and application development related to SAC Tracks. The Student Research Competition (SRC) program is designed to provide graduate students the opportunity to meet and exchange ideas with researcher and practitioners in their areas of interest.
All research abstract submissions will be reviewed by researchers and practitioners with expertise in the track focus area to which they are submitted. Authors of selected abstracts will have the opportunity to give poster presentations of their work and compete for three top winning places. The SRC committee will evaluate and select First, Second, and Third place winners. The winners will receive cash awards and SIGAPP recognition certificates during the conference banquet dinner. Authors of selected abstracts are eligible to apply to the SIGAPP Student Travel Award program for support.
Submission - Graduate students are invited to submit abstracts (minimum of two pages; maximum of four pages) of their original unpublished and in-progress research work following the instructions published at SAC web-site. The submissions must address research work related to a SAC track, with emphasis on the innovation behind the research idea, including the problem being investigated, the proposed approach and research methodology, and sample preliminary results of the work. In addition, the abstract should reflect on the originality of the work, innovation of the approach, and applicability of anticipated results to real-world problems. All SRC works must be submitted through the main conference web page.
Please note SRCs and regular papers must be submitted at different pages of the START web system. Submitting the same abstract to multiple tracks is not allowed. It is recommended to refer to the official SRC Information Sheet for further details.
|Wei-Chung Hsu||National Taiwan University, Taiwan|
|Jalil Boukhobza||University of Brest, France|
|Chien-Chung Ho (contact)||National Chung-Cheng University, Taiwan|
Track Program committee
|Luca Abeni||Università di Trento, Italy|
|Luis Almeida||Universidade do Porto, Portugal|
|Sandro Bartolini||Università di Siena, Italy|
|Joao Cardoso||Universidade do Porto, Portugal|
|Francisco J. Cazorla||IIIA-CSIC and Barcelona Supercomputing Center, Spain|
|Li-Pin Chang||National Chiao Tung University, Taiwan|
|Tseng-Yi Chen||National Central University, Taiwan|
|Mingsong Chen||East China Normal University, China|
|Marco Di Natale||Scuola Superiore S. Anna, Italy|
|Emmanuel Grolleau||ENSMA, France|
|Zonghua Gu||Zhejiang University, China|
|Raphael Guerra||Universid. Federal Fluminense, Brasil|
|Frank Hannig||Friedrich-Alexander-Universität, Germany|
|Per Gunnar Kjeldsberg||NTNU, Norway|
|Chokri Mraidha||CEA List, France|
|Pierre Olivier||Manchester Univ, UK|
|Luigi Palopoli||The University of Manchester, UK|
|Roberto Passerone||Università di Trento, Italy|
|Keni Qiu||Capital Normal University, China|
|Christine Rochange||IRIT, France|
|Martin Schoeberl||Danmark Tekniske Universitet, Denmark|
|Liang Shi||East China Normal University, China|
|Ciprian TEODOROV||Lab-STICC, ENSTA Bretagne, France|
|Hiroyuki Tomiyama||Ritsumeikan University, Japan|
|Chia-Heng Tu||National Cheng Kung University, Taiwan|
Inquiries should be sent to Chien-Chung Ho